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Manual Conventions
Table 1-1. High True/Low True Signal Conventions
Signal/Symbol
PIN 1
PIN
PIN
Logic State
True
False
True
Signal State
Asserted
Deasserted
Asserted
Voltage
Ground 2
V CC3
V CC
PIN False
Deasserted
Ground
Notes: 1.
2.
3.
PIN is a generic term for any pin on the chip.
Ground is an acceptable low voltage level. See the appropriate data sheet for the range of acceptable low
voltage levels (typically a TTL logic low).
V CC is an acceptable high voltage level. See the appropriate data sheet for the range of acceptable high
voltage levels (typically a TTL logic high).
Pins or signals that are asserted low (made active when pulled to ground) are indicated like
this:
— In text, they have an overbar: for example, RESET is asserted low.
— In code examples, they have a tilde in front of their names. In Example 1-1 , line 3
refers to the SS0 signal (shown as ~SS0 ).
Sets of signals are indicated by the first and last signals in the set, for instance HAD[0–7].
“Input/Output” indicates a bidirectional signal. “Input or Output” indicates a signal that is
exclusively one or the other.
Code examples are displayed in a monospaced font, as shown in Example 1-1 .
Example 1-1. Sample Code Listing
BFSET#$0007,X:PCC; Configure:
line 1
;
MISO0, MOSI0, SCK0 for SPI master
line 2
; ~SS0 as PC3 for GPIO
line 3
Hexadecimal values are indicated with a $ preceding the value, as follows: $FFFFFF is the
X memory address for the core interrupt priority register.
The word “reset” is used in four different contexts in this manual:
— the reset signal, written as RESET
— the reset instruction, written as RESET
— the reset operating state, written as Reset
— the reset function, written as reset
DSP56311 User’s Manual, Rev. 2
Freescale Semiconductor
1-3
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